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SAE AS4710
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SAE AS4710 Revision A, May 1, 2012
PI-Bus
Description / Abstract:
This document is a result of the desire for interoperability of
modules on a pi-Bus. This standard is a stand alone document that
used the Very High Speed Integrated Circuit (VHSIC) Phase 2,
Interoperability Standard PI-Bus Specification 2.2, as a starting
point.
Purpose:
This standard defines a bus and module interface to the Pi-Bus. This standard specifies the requirements/functions for the Pi-Bus side of a Bus Interface Unit (BIU) needed to facilitate the interoperability of modules on a Pi-Bus for avionics systems. The corresponding software/device side interface requirements are not specified in this standard.
Field of Application:
The Pi-Bus is intended to provide a Master-Slave communications path for transferring digital messages between a set of up to 32 modules residing on a single backplane.
Buses and modules shall be classified according to their maximum capabilities. Bus sequence shall be classified according to the Type or Class of transfer actually used.
All modules and buses shall be capable of operating in Type 16, Class ED mode.
16 ED Mode: A 16 ED module shall be configurable to operate on one of two separate 16 ED buses. The module shall be capable of participating in 16 ED Vie and message sequences.
32 EC Nonmixed Mode: A 32 EC nonmixed mode modules shall be configurable to operate in either a 16 ED configuration or a 32 EC nonmixed mode configuration. In a 16 ED configuration, it shall operate as a 16 ED module. In the 32 EC nonmixed mode configuration. It shall operate on a single error correction bus (which contains only modules operating in 32 EC nonmixed mode) using 32 EC Vie and message sequences.
32 EC Mixed Mode: A 32 EC mixed mode modules shall be configurable to operate in one of two configurations. The first configuration is the 32 EC nonmixed mode configuration.
In the second configuration, it shall be capable of performing 16 ED Vie, 16 ED message and 32 EC message sequences, to allow interoperation of 16 ED modules and 32 EC mixed mode modules. In this configuration, the modules shall be configurable to operate on one of two separate 16 ED buses as well as a 32 EC bus. A 32 EC mixed mode module operating in the second configuration will not be interoperable with a 32 EC nonmixed mode module operating in the 32 EC configuration. This configuration shall use the format bit, DF0, and DC0 to determine which message Type (i.e., 16 ED or 32 EC) sequence to perform.
Purpose:
This standard defines a bus and module interface to the Pi-Bus. This standard specifies the requirements/functions for the Pi-Bus side of a Bus Interface Unit (BIU) needed to facilitate the interoperability of modules on a Pi-Bus for avionics systems. The corresponding software/device side interface requirements are not specified in this standard.
Field of Application:
The Pi-Bus is intended to provide a Master-Slave communications path for transferring digital messages between a set of up to 32 modules residing on a single backplane.
Buses and modules shall be classified according to their maximum capabilities. Bus sequence shall be classified according to the Type or Class of transfer actually used.
All modules and buses shall be capable of operating in Type 16, Class ED mode.
16 ED Mode: A 16 ED module shall be configurable to operate on one of two separate 16 ED buses. The module shall be capable of participating in 16 ED Vie and message sequences.
32 EC Nonmixed Mode: A 32 EC nonmixed mode modules shall be configurable to operate in either a 16 ED configuration or a 32 EC nonmixed mode configuration. In a 16 ED configuration, it shall operate as a 16 ED module. In the 32 EC nonmixed mode configuration. It shall operate on a single error correction bus (which contains only modules operating in 32 EC nonmixed mode) using 32 EC Vie and message sequences.
32 EC Mixed Mode: A 32 EC mixed mode modules shall be configurable to operate in one of two configurations. The first configuration is the 32 EC nonmixed mode configuration.
In the second configuration, it shall be capable of performing 16 ED Vie, 16 ED message and 32 EC message sequences, to allow interoperation of 16 ED modules and 32 EC mixed mode modules. In this configuration, the modules shall be configurable to operate on one of two separate 16 ED buses as well as a 32 EC bus. A 32 EC mixed mode module operating in the second configuration will not be interoperable with a 32 EC nonmixed mode module operating in the 32 EC configuration. This configuration shall use the format bit, DF0, and DC0 to determine which message Type (i.e., 16 ED or 32 EC) sequence to perform.
SAE AS4710 Revision A, May 1, 2012
PI-Bus